The present invention relates to an ESD protection circuit, a semiconductor device, an on-vehicle electronic device, and an on-vehicle electronic system, and more particularly, to an ESD protection circuit, a semiconductor device, an on-vehicle electronic device, and an on-vehicle electronic system, which are suitable for, for example, achieving a highly precise ESD protection operation.
An ESD protection circuit that absorbs ESD (Electro-Static Discharge; surge voltage) to thereby prevent a protected circuit from being broken has recently been under development.
Related art is disclosed in Japanese Unexamined Patent Application Publication No. 2000-77537. A surge protecting circuit disclosed in Japanese Unexamined Patent Application Publication No 2000-77537 includes a power MOSFET, a gate drive circuit, which controls turning on/off of the power MOSFET, a Zener diode group, which is provided between a drain and a gate of the power MOSFET and causes a breakdown when a surge voltage is applied to the drain of the power MOSFET, and a resistive element, which is provided between the gate of the power MOSFET and the gate drive circuit and prevents a current from flowing from the gate of the power MOSFET to the gate drive circuit (see FIG. 13 of Japanese Unexamined Patent Application Publication No. 2000-77537). In this surge protecting circuit, when a surge voltage is applied to the drain of the power MOSFET and the Zener diode group causes a breakdown, the gate voltage of the power MOSFET increases and the power MOSFET turns on, so that the surge voltage is absorbed.
In addition, Japanese Unexamined Patent Application Publication No. 2002-324842 discloses a CMOS protection circuit that includes NMOS transistors as protection elements each having a drain connected to an input/output terminal and each having a gate and a source which are connected to a ground terminal (see FIG. 7 of Japanese Unexamined Patent Application Publication No. 2002-324842).